DYNANIC’s CEO Pavol Korček and CTO Lukáš Kekely made a strong impression at the DPDK Summit 2025 in Prague, where they presented the company’s latest innovations in FPGA SmartNIC technology. Their talk, “Benefits of rte_flow Groups Specialization for FPGA SmartNICs,” sparked great interest and positive feedback from the DPDK community.
Lukáš Kekely demonstrated how DYNANIC leverages rte_flow group specialization to optimize packet processing on FPGA-based SmartNICs, simplifying the development of high-performance network functions. The session showcased how developers can achieve flexible, lossless throughput—up to 400 Gbps—without requiring deep FPGA knowledge.
This presentation reaffirmed DYNANIC’s role as a forward-thinking contributor to the DPDK ecosystem, pushing the boundaries of what’s possible in data plane acceleration.
The response? Overwhelmingly positive — and not just from developers.
💬 Altera:
“Excited to see our partners showcasing what’s possible with DPDK and Altera FPGAs! DYNANIC’s seamless integration with Agilex™ 5 and 7 FPGAs is a game-changer for developers pushing the boundaries of 400GE networking.”
💬 Silicom Denmark A/S:
“Great to see our partner DYNANIC pushing the boundaries of high-speed networking with FPGA and DPDK! We’re proud to be part of this powerful ecosystem, now supporting the latest 400GE-capable cards with Agilex™ FPGAs.”
This kind of feedback confirms our mission: make FPGA acceleration accessible and useful for real-world, high-performance applications.
A recording of the session can be seen here:
