400G Ultra Ethernet for AI Infrastructure at SuperComputing 2026

Meet DYNANIC with Altera at SuperComputing 2026

  • November 17–19, 2026
  • McCormick Place, Chicago, USA
  • Altera booth 2854

Why a programmable endpoint matters for 400G+ Ultra Ethernet

As HPC and AI clusters scale, the network decides how much of the cluster actually computes. When data exchange between nodes stalls, compute nodes wait – and still consume power and cooling. Ultra Ethernet promises an open, scalable alternative to proprietary fabrics, but the standard is young and will keep changing. Endpoints fixed in silicon lock in one version of it.

DYNANIC chooses different approach that:

  • Evolves with the standard. FPGA pipelines follow new Ultra Ethernet specification releases through software updates – no new silicon generation required.
  • Keeps the cluster working. Lossless, line-rate RDMA with predictable latency reduces the time compute nodes spend waiting on the network.
  • Open and inspectable. Transport behavior that research teams can observe and tune, for example for congestion control or telemetry work.
  • No FPGA expertise required. Pre-built, optimized pipelines are integrated through standard interfaces such as libfabric and DPDK.

In practice it means that Altera Agilex 7 FPGAs provide the adaptable foundation, and DYNANIC turns it into a ready-to-use, line-rate Ultra Ethernet endpoint. Together, HPC and AI infrastructure teams get the performance of dedicated hardware with the ability to follow the standard in the field.

What you will see at booth 2854

Throughput

Message rate

Latency

Protocol

Platform

The DYNANIC demo is part of Altera’s wider SC26 showcase of FPGA solutions for HPC and AI infrastructure. Plan your visit to booth 2854 and see what else Altera and its partners are showing!

Meet DYNANIC at Altera booth 2854

We are available during all exhibit hall hours: Tuesday and Wednesday, 10:00 AM – 6:00 PM, and Thursday, 10:00 AM – 3:00 PM.

You can meet with

About Altera

Altera Corporation is a supplier of programmable logic technology, with a portfolio spanning FPGAs, CPLDs, intellectual property, development tools, and acceleration platforms for cloud, network, and edge applications. The Agilex 7 M-series FPGA used in this demonstration provides the transceiver capacity and PCIe Gen5 host interface required for lossless packet processing at 400 GbE.

For more information, visit altera.com.

About DYNANIC

DYNANIC is a company founded by researchers and engineers with more than two decades of experience in FPGA-based network acceleration. The company develops high-performance and highly adaptable networking solutions that help infrastructure scale, evolve, and maintain predictable performance using a unique 400G approach.

DYNANIC simplifies FPGA adoption through ready-to-integrate software interfaces and programmable packet-processing technology, enabling customers to deploy hardware-accelerated networking without the complexity traditionally associated with FPGA development.



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